After checking few times the paperwork with logic states to confirm the expected behavior, I tried simulating the comb generator circuit.
I used NOR gates instead of NAND because I will build it with a 74HC02 and not a 74HC00, but the effect is the same.
I found a Java-based logic simulator called logsim. It does not produce output vs. time plots, so a D flip-flop is added to evaluate the effect of propagation delay (as described in logsim manual).
Here is the diagram. Don't forget to RTFM.
Results so far: in theory, it works. Simulated, it work. Will it work?